DDR1 SDRAM
Zentel DDR1 SDRAM is a 4-bank x 8,388,608-word x 8bit, or 4-bank x 4,194,304-word x 16bit double data rate synchronous DRAM with SSTL_2 interface. All control and address signals are referenced to the rising edge of CLK. Input data is registered on data strobe, and output data. Data strobe are referenced on both edges of CLK. The devices achieve a very high-speed clock rate up to 200MHz.
