PI7C9X3G1632GP PCIe3.0 Packet Switch
Diodes Incorporated PI7C9X3G1632GP PCIe3.0 Packet Switch supports 32 lanes of GEN3 SERDES in flexible 2-port to 16-port configurations. The architecture of the PCIe packet switch allows the flexible port configuration by allocating variable lane width for each port. A basic cell of the switch architecture is called a tile, which consists of 8 ports and 16 lanes. The PI7C9X3G1632GP is built with 2 tiles connected by internal signal paths.
